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Lecturer ARM Ltd |
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Peter Harrod (IEEE Member ’80-Senior Member ’99) graduated with a BSc(Eng) from the University of the Witwatersrand in 1976 and with MSc and PhD degrees from the University of Manchester Institute of Science and Technology in 1978 and 1982 respectively.
From 1982-1985, he was a Research Engineer in the Very High Performance IC Laboratory at the GEC Hirst Research Centre, where he was involved in pattern processing for E-beam lithography and in the implementation of CMOS-SOS VLSI ICs.
From 1985-1988, he was a Senior Staff Engineer in the High-End Microprocessor Group at Motorola Inc in Austin, Texas, where he did logic and circuit design for the MC68030 and MC68040 microprocessors.
In 1988, he joined Acorn Computers Ltd in Cambridge, UK, where he was a Senior Design Engineer in the Advanced R&D Department and was involved in the design of a floating point chip and carried out one of the first implementations of IEEE 1149.1 boundary scan.
ARM was spun out from Acorn Computers in 1990 and he was one of the founding team. Since then he has worked on a wide variety of CPU, SOC and debug and trace units.
He is now a Manager in the CPU design group at ARM, where he continues to work on the design and verification of embedded CPUs. He has a particular interest in the areas of design for test and debug and in the design of dependable processors.
He is a Fellow of the IET and has served on several IEEE standards and conference program committees.