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Lecture May 26 10:35 |
Customers have come to expect increasingly more functionality and higher performance from their mobile phones, automobiles, computers, televisions, and other mobile and home appliances. To keep up with these expectations, chip designs have significantly increased in complexity over the past four decades and are realized using state-of-the-art process technologies. However, before silicon is manufactured, the correctness of a new chip design needs to be verified using a combination of formal verification, simulation, and emulation techniques. These techniques improve the confidence that the fabricated chip will behave according to its customer specification.
However, it is currently not possible to verify all use cases of a complex chip design at the level of detail of a physical implementation before fabrication. Prototype silicon may therefore still contain functional bugs that are only detected post-silicon i.e., after fabrication. Any such remaining functional bugs have to be found and removed as quickly as possible using post-silicon validation and debug techniques. Industry benchmarks show that on average less than 40% of designs are right first-time, and that the post-silicon validation, debug, and diagnosis tasks consume on average over 50% of the total project time. Research on effective and efficient post-silicon debug methodologies is therefore essential to help reduce the time-to-market for these complex chip designs.
This lecture will provide an overview of the design and pre-silicon verification and validation
processes for MPSOCs, a detailed understanding of the complexity of debugging these chips, and an
overview of state-of-the-art methodologies for their post-silicon functional debug, with
illustrations from example use cases.
- Prerequisites
- Prerequisites & suggested preliminary readings
Basic understanding of digital design, BS or MS in Electrical Engineering, Computer Engineering, or Computer Science.
- Syllabus
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Introduction
SOC Design
SOC verification and validation
SOC debug
The complexity of debugging SOCs
Post-silicon debug
CSAR debug approach
On-chip debug architecture
Design foe debug flow
Off-chip debugger software
Summary and conclusion
References