Jerzy Tyszer

Lecturer

Poznań University of Technology
Inst. of Electronics and Telecommunications
ul. Piotrowo 3a
PL-60-965 Poznań
Poland


Jerzy Tyszer is the Professor of Electronics and Computer Science at the Faculty of Electronics and Telecommunications of Poznań University of Technology, Poland.

His main research interests include design for testability, built-in self-test, and embedded test. He is co-inventor of the award-winning Embedded Deterministic Test (EDT™) technology used in the first commercial test compression product TestKompress®. His paper on EDT at the IEEE International Test Conference in 2002 was recognized as one of the most significant papers published in the last 35 years. He was co-recipient of the 1995 and 1998 Best Paper Awards at the IEEE VLSI Test Symposium, the 2003 Honorable Mention Award at the IEEE International Test Conference, the 2009 Best Paper Award at the VLSI Design Conference, and a very prestigious 2006 IEEE Circuits and Systems Society Donald O. Pederson Outstanding Paper Award recognizing the paper on EDT published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

He has published 7 books, more than 100 research papers and is co-inventor of 42 US and international patents. Prof. Tyszer is co-author of Arithmetic Built-In Self-Test for Embedded Systems, Prentice Hall, 1997, and the author of Object-Oriented Computer Simulation of Discrete Event Systems, Kluwer Academic Publishers, 1999.

He is serving on technical program committees of various IEEE conferences including International Test Conference, VLSI Test Symposium, and European Test Symposium.

He received the Ph.D. degree in electrical engineering from Poznań University of Technology, Poland, in 1987. He was with McGill University, Montreal, Canada, from 1990 to 1996 as a Research Associate and Adjunct Professor.