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Lecture May 21 16:30 |
This tutorial discusses test methods and voltage stress approaches required to ensure cost effective defect screening to produce high quality, reliable products. With process variation having ever increasing significance, and design cannot completely compensate, test methods must deal with the variation. Adaptive test is being increasingly adopted to ensure high quality and reliability at a cost that cannot be achieved with traditional static testing.
The causes of process variation are discussed, highlighting increasing problems with more advanced technology nodes. A description of reliability measures is followed by a discussion of latent versus hard defects, and methods to accelerate latent defects so they can be detected at wafer/package test. Wearout and breakdown mechanisms are discussed in the light of stress techniques, which demonstrate limitations in stress effectiveness. Statistical based outlier screening methods are described, especially from the point of view of adaptive test.
A framework for adaptive test is presented and shows the many places where test data can be utilised. Some existing examples of adaptive test are described. These include its use for process ramp and debug, improved screening by modelling good die statistically and correlating fails of interest, and dynamic test elimination for analog circuits. Other benefits are discussed such as test cost reduction and operational test floor improvements.
Finally, several challenges are discussed. These include IT infrastructure, enabling of full traceability, developing tester-to/from-data analysis engine communication with significantly impacting test time, and the development of improved models and algorithms. The latter requires work in development of methods where the models are not fixed, better understanding of peripheral coverage and the associated quality impact of dropped or modified tests, and more encompassing fault coverage metrics, particularly for analog circuits.
- Prerequisites
Basic knowledge of electrical engineering, computer science and statistics.
- Suggested preliminary reading
IEEE Design and Test special issue on latent defect screening, March-April, 2006 (several interesting papers).
Production Data-Driven Statistical Testing, Session 13, Proceedings International Test Conference, 2005.
P, Maxwell, "Adaptive Test Directions", Proceedings European Test Symposium, 2010, pp. 12-16.
- Learning Outcomes
Understand the topics given in detail above.
- Syllabus
Process complexity and variability. Implications of sub-wavelength printing techniques. A primer on optical proximity correction. Sources of variability. How lithography, gate oxide thickness and doping concentration translate into electrical parameter variations. Examples of effects of parameter variation and the limitations in design and modelling to deal with it.
Reliability units and measures. The traditional bathtub curve and how it is related to hazard rate and the Weibull distribution.
Hard versus latent defects and the need to accelerate latent defects to screen early life failures. Voltage and temperature acceleration and the reduced effectiveness with low supply voltage. How time dependent dielectric breakdown and hot carrier injection place constraints on voltage stress. Description and comparison of dynamic and enhanced voltage stress. Introduction to NBTI.
Components of wafer level reliability screen test suites. The concept of outlier screening. Parametric measurements and problems with fixed threshold techniques. Data driven testing and variance reduction. Methods to reduce variance by using predictors and residuals. Examples of outlier screens using statistical processing, part average testing, Iddq, MinVdd, Fmax. The benefits of adaptive limits.
Development of a framework for adaptive test showing how real-time analysis and optimization, and post-test analysis and disposition are integrated into various test steps. The use of feed-forward data from inline test and early test steps to later test steps and feed-back data from post-test statistical analysis to optimize testing of future products.
Examples of adaptive test. Its use for process ramp and debug, improved screening by modelling good die statistically and correlating fails of interest, and dynamic test elimination for analog circuits.
Stages of adaptive test. Static adaptation. Using real-time circuit response as input to algorithms which set test limits or test flows. Algorithm parameter determination and algorithm selection by characterization or by real-time response. New ideas in adaptation - adaptive on-chip sensors for NBTI aging.
Benefits of adaptive test. How the approach improves test cost, quality and reliability, yield learning, tester utilization and test floor efficiency.
Challenges. IT infrastructure, enabling of full traceability, developing tester-to/from-data analysis engine communication with significantly impacting test time, and the development of improved models and algorithms. development of methods where the models are not fixed, better understanding of peripheral coverage and the associated quality impact of dropped or modified tests, and more encompassing fault coverage metrics, particularly for analog circuits. Implications of multi-site test.