Program

Download the complete program and course description as pdf.

Friday, May 20

19:00
Welcome Reception

Saturday, May 21

08:00
Welcome Address
Hans-Joachim Wunderlich

08:15
Introduction of Attendees

10:30
Technology Trends in VLSI and Impact on Reliability and Test (part I)
Shekhar Borkar

12:45
Lunch

14:00
Technology Trends in VLSI and Impact on Reliability and Test (part II)
Shekhar Borkar

16:30
Wafer Level Reliability Screens and Adaptive Test (part I)
Peter Maxwell

19:00
Dinner

Sunday, May 22

08:00
Wafer Level Reliability Screens and Adaptive Test (part II)
Peter Maxwell

10:30
Understanding defects, diagnosis and variation (part I)
Rob Aitken

12:45
Lunch

14:00
Understanding defects, diagnosis and variation (part II)
Rob Aitken

16:30
Fault Models and Test Algorithms for Nanoscale Technologies (part I)
Bernd Becker

19:00
Dinner

Monday, May 23

08:00
Fault Models and Test Algorithms for Nanoscale Technologies (part II)
Bernd Becker

10:30
Checkout, Social Event, Lunch and Transfer

14:00
Embedded Memory Testing: Fault Models, Test Algorithms, MBIST and Industrial Results
Said Hamdioui

14:00
Design for Test and Fault Tolerance for Nanoscale Circuits
Sybille Hellebrand