Wafer Level Screening Techniques

For advanced CMOS technologies, we are now capable of creating billions to trillions of transistors per design. Following the economic path of Moore's law, we have built expertise to fool light as layout features needed to go sub-lithography. We have integrated new materials at an increasing pace to drive performance, power, and reliability. However, these advances brought and are continuing to bring significant challenges in dealing with variation. One of the key challenges in dealing with variation is understanding the impact on product reliability. This is becoming increasingly important to scale across differing business models and end applications. Automotive zero-defect requirements are moving more quickly to advanced CMOS technologies to meet the growing electronic content for safety, efficiency, and infotainment. Requirements for the internet-of-things (IOT) are also important business applications to dial in the right product reliability capability. The back-room compute and infrastructure needs have been around 100 defective-parts-per-million (DPPM) or below. It is not clear if the sensor fringe of IOT can attain aggressive DPPM at an economical cost point. In order to cover the above trends and observations, this class will unfold in two parts – Product Reliability & Wafer-Level Screening. To set the foundation, we will discuss the basics of reliability as applied to products. We will review the “bathtub curve” that outlines the reliability risk over time. An understanding of the main front-end and back-end reliability mechanisms will tie the material and layout control challenges in processing to the defect observability challenges in test. Once we understand the characteristics of a failure over time, we can see how wafer-level screening techniques can allow us to assess future failure risk. A critical component of these techniques is an understanding of how to leverage variation and statistics to our advantage. Published industry results will be used to show the benefits to augment traditional functional, structural, and spec-based testing approaches.