Adit D. Singh received the B.Tech from the Indian Institute
of Technology (IIT) in Kanpur, and the M.S. and Ph.D. from
Virginia Tech, all in Electrical Engineering. Currently he
is James B. Davis Professor of Electrical and Computer
Engineering at Auburn University. Earlier, he has held
faculty positions at the University of Massachusetts,
Amherst and Virginia Tech in Blacksburg. His research
interests span high performance VLSI systems, IC and SOC
testing, and microelectronic system reliability and fault
tolerance. He has published extensively in these areas, and
holds several international patents that have been licensed
to industry. He is particularly recognized for his
pioneering contributions to statistical methods in test and
adaptive testing. In addition to extensive support from US
the National Science Foundation, his research has also been
supported by the Max Plank Society of Germany, and the
Fulbright Foundation, the National Science Council of
Taiwan, and the Government of India. He is a popular
lecturer and over the years has been invited to present over
seventy technical courses at international conferences, and
in-house in companies. Professor Singh served two terms
(2007-11) as Chair of the IEEE Test Technology Technical
Council, and currently serves on the Board of Governors of
the IEEE Council on Design Automation (CEDA), and on the
editorial boards of IEEE Design and Test Magazine and the
Journal of Test and Test Applications (JETTA). Over the
years has held leadership positions in dozens of technical
conferences, most recently serving on the steering
committees of the International Test Conference (2008-2012),
the VLSI Test Symposium (2001-2014), as Co-General Chair for
the 2010-14 IEEE International Workshops on Reliability
Aware Design and Test (RASDAT), and Co-Program Chair of the
2014 International Conference on VLSI Design. He is a Fellow
of the IEEE, and a “Golden Core” member of the IEEE Computer
Society.
