Friday 23 May 2014
16:00-19:00 Registration
19:00 Social: Welcome Reception and Dinner in the Restaurant "La Verdure"
Saturday 24 May 2014
07:30-08:00 Registration
08:00-08:15 Welcome Address (Hans-Joachim WUNDERLICH)
08:15-09:30 Each attendee introduces her/himself
09:30-10:30 Lecture: Introduction to VLSI Test Technology [A. Singh]
10:30-10:45 Break: Coffee
10:45-12:45 Lecture: Introduction to VLSI Test Technology [A. Singh]
12:45-14:00 Break: Lunch
14:00-15:00 Lecture: Introduction to VLSI Test Technology [A. Singh]
15:00-16:00 Lecture: Fault modeling, fault simulation and ATPG [B. Becker]
16:00-16:15 Break: Coffee
16:15-18:00 Lecture: Fault modeling, fault simulation and ATPG [B. Becker]
18:15 Social: Visit to the Quax-hangar at Paderborn airport (airplane hangar with historic aircraft), followed by dinner.
Sunday 25 May 2014
08:00-09:15 Lecture: Fault modeling, fault simulation and ATPG [B. Becker]
09:15-10:15 Lecture: Embedded Test: From Test Compression to Logic Built-In Self-Test [J. Rajski]
10:15-10:30 Break: Coffee
10:30-12:30 Lecture: Embedded Test: From Test Compression to Logic Built-In Self-Test [J. Rajski]
12:30-13:45 Break: Lunch
13:45-14:45 Lecture: Embedded Test: From Test Compression to Logic Built-In Self-Test [J. Rajski]
14:45-15:45 Lecture: Defect based testing [M. Renovell]
15:45-16:00 Break: Coffee
16:00-17:00 Lecture: Defect based testing [M. Renovell]
17:15 Social: Traditional archery event Haxterpark (indoor or outdoor, depending on weather conditions ), followed by dinner.
Monday 26 May 2014
08:00-10:00 Lecture: Defect based testing [M. Renovell]
10:00-10:30 Check out
10:30 Social: Tour of Paderborn city, followed by lunch
14:00-18:30 Lecture: Mixed-signal/RF design-for-test: principles and advanced techniques [S. Mir]
14:00-18:30 Lecture: Production test practices - How they vary and why? [J. Rivoir]