People

Muhammad Shafique

NYU Abu Dhabi, UAE

Biography

Muhammad Shafique received his Ph.D. degree in computer science from the Karlsruhe Institute of Technology (KIT), Germany, in 2011. Afterwards, he established and led a highly recognized research group at KIT for several years as well as conducted impactful R&D activities across the globe. Besides co-founding a technology startup in Pakistan, he was also an initiator and team lead of an ICT R&D project. He has also established strong research ties with multiple universities worldwide, where he has been actively co-supervising various R&D activities and theses since 2011, resulting in top-quality research outcome and scientific publications. Before KIT, he was with Streaming Networks Pvt. Ltd. where he was involved in research and development of video coding systems for several years. In Oct.2016, he joined the Institute of Computer Engineering at the Faculty of Informatics, Technische Universität Wien (TU Wien), Vienna, Austria as a Full Professor (Univ.Prof.) of Computer Architecture and Robust, Energy-Efficient Technologies. Since Sep.2020, he is with the Division of Engineering at New York University (NYU) Abu Dhabi in UAE, and is a Global Network faculty at the NYU's Tandon School of Engineering (NYU-NYC) in USA. He is the director of the eBrain research lab, and is also a Co-PI/Investigator in multiple NYUAD Centers, including Center of Artificial Intelligence and Robotics (CAIR), Center of Cyber Security (CCS), Center for InTeractIng urban nEtworkS (CITIES), and Center for Quantum and Topological Systems.

Dr. Shafique has demonstrated success in obtaining prestigious grants, leading team-projects, meeting deadlines for demonstrations, motivating team members to peak performance levels, and completion of independent challenging tasks. His experience is corroborated by strong technical knowledge and an educational record (throughout Gold Medalist). He also possesses an in-depth understanding of various video coding standards. His research interests are in AI & machine learning hardware and system-level design, brain-inspired & neuromorphic computing, autonomous systems, wearable healthcare, energy-efficient systems, robust computing, hardware security, emerging technologies, FPGAs, MPSoCs, and embedded systems. His research has a special focus on cross-layer analysis, modeling, design, and optimization of computing and memory systems. The researched technologies and tools are deployed in various application use cases from Internet-of-Things (IoT), smart Cyber-Physical Systems (CPS), and ICT for Development (ICT4D) domains.

Dr. Shafique has given several Keynotes, Invited Talks, and Tutorials at premier venues, and has organized many special sessions at flagship conferences (like DAC, ICCAD, DATE, and ESWeek). He has served as the Associate Editor and Guest Editor of prestigious journals like IEEE Transactions on Computer Aided Design (TCAD), IEEE Design and Test Magazine (D&T), ACM Transactions on Embedded Computing (TECS), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier MICPRO. He has served as the TPC Chair of several conferences like IGSC, ISVLSI, PARMA-DITAM, RTML, ESTIMedia and LPDC; General Chair of ISVLSI, IGSC, DDECS and ESTIMedia; Track Chair at DAC, ICCAD, DATE, IOLTS, DSD and FDL; and PhD Forum Chair of ISVLSI. He has also served on the program committees of numerous prestigious IEEE/ACM conferences including ICCAD, DAC, ISCA, DATE, CASES, ASPDAC, and FPL. He is a senior member of the IEEE and IEEE Signal Processing Society (SPS), and a professional member of the ACM, SIGARCH, SIGDA, SIGBED, and HIPEAC. He holds one US patent and has (co-)authored 6 Books, 15+ Book Chapters, 300+ papers in premier journals and conferences, and over 50 archive articles.

Dr. Shafique received the prestigious 2015 ACM/SIGDA Outstanding New Faculty Award (given world-wide to one person per year), the AI-2000 Chip Technology Most Influential Scholar Award in 2020, the ATRC's ASPIRE Award for Research Excellence in 2021, six gold medals in his educational career, and several best paper awards and nominations at prestigious conferences like CODES+ISSS, DATE, DAC and ICCAD, Best Master Thesis Award, DAC'14 Designer Track Best Poster Award, IEEE Transactions of Computer "Feature Paper of the Month" Awards, and Best Lecturer Award. His research work on aging optimization for GPUs featured as a Research Highlight in the Nature Electronics, Feb.2018 issue. Dr. Shafique's students have also secured many prestigious student and research awards in the research community.

Manuel Barragan

Université Grenoble Alpes, CNRS, Grenoble-INP, TIMA, FR

Biography

MANUEL J. BARRAGAN received the M.Sc. degree in Physics and the Ph.D. degree in Microelectronics from the Universidad de Sevilla, Seville, Spain, in 2003 and 2009, respectively, and the HDR degree from the Universite Grenoble-Alpes, Grenoble, France, in 2019.

He is currently a Researcher with the French National Research Center (CNRS) at TIMA Laboratory, Grenoble, France, where he leads the Reliable RF and Mixed-Signal Systems group. Previously he held Postdoc Research positions with Grenoble INP, TIMA laboratory, Grenoble, France, and the Spanish National Research Council (CSIC), IMSE-CNM, Seville, Spain. He is the author or coauthor of more than 100 international publications including international journals, conferences, invited lectures, patents and book chapters. His research is focused on the topics of test and design for testability of analog, mixed-signal, RF and mm-wave integrated systems.

Dr. Barragan's Ph.D. research won a Silver Leaf Award at the IEEE PRIME conference in 2009. He received the Best Paper Award at the 2018 IEEE European Test Symposium and the Best Special Session Award at the 2015 IEEE VLSI Test Symposium. He served as Technical Program Chair for the IEEE International Mixed-signal and Systems Test Workshop (2016 and 2017) and IEEE NEWCAS conference (2020 and 2021). He currently serves on the Technical Program Committee of major international conferences, including the IEEE European Test Symposium, the IEEE VLSI Test Symposium and the Design, Automation, and Test in Europe (DATE) Conference.

Scientific highlights in the last few years include:

• First-ever systematic methodology for non-intrusive mm-wave test: we have outlined and demonstrated the first-ever machine learning-based non-intrusive test methodology for mm-Wave circuits. This work was awarded a Best Paper Award from the IEEE European Test Symposium 2018 and a Best Poster Award from the Journées Nationales de Réseau Doctoral en Micro-nanoélectronique 2017.
• Advanced modeling of mm-wave couplers for design enhancement: first-ever design-oriented model considering frequency-dependent electrical losses. This work was awarded the Best Reading Paper in the December 2020 issue of IEEE Trans. on Microwave Theory and Techniques.
• First-ever OBT technique for mm-wave circuits: we have demonstrated the potential of Oscillation- Based Test techniques for the test and calibration of phased arrays. This work was selected as a Best Paper candidate in IEEE VLSI Test Symposium 2018.
• First-ever exploration of causal features for AMS-RF indirect test: in collaboration with the Institute of Microelectronics of Seville (IMSE-CNM), we have proposed novel causal feature selection techniques for diagnosis enhanced machine learning-based test of AMS-RF circuits. This work was selected as a Best Paper candidate in Design Automation and Test in Europe 2017.

Yiorgos Makris

The University of Texas at Dallas, USA

Biography

Yiorgos Makris received the Diploma of Computer Engineering from the University of Patras, Greece, in 1995 and the M.S. and Ph.D. degrees in Computer Engineering from the University of California, San Diego, in 1998 and 2001, respectively. After spending a decade on the faculty of Yale University, he joined UT Dallas where he is now a Professor of Electrical and Computer Engineering, the Co-Founder and Site-PI of the NSF Industry University Cooperative Research Center on Hardware and Embedded System Security and Trust (NSF CHEST I/UCRC), as well as the Leader of the Safety, Security and Healthcare Thrust of the Texas Analog Center of Excellence (TxACE) and the Director of the Trusted and RELiable Architectures (TRELA) Research Laboratory. His research focuses on applications of machine learning and statistical analysis in the development of trusted and reliable integrated circuits and systems, with particular emphasis in the analog/RF domain. He serves as an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and has served as an Associate Editor for the IEEE Information Forensics and Security and the IEEE Design & Test of Computers Periodical, as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. He also served as the 2016-2017 General Chair and the 2013-2014 Program Chair of the IEEE VLSI Test Symposium. He is a recipient of the 2006 Sheffield Distinguished Teaching Award, Best Paper Awards from the 2013 IEEE/ACM Design Automation and Test in Europe (DATE'13) conference and the 2015 IEEE VLSI Test Symposium (VTS'15), as well as Best Hardware Demonstration Awards from the 2016 and the 2018 IEEE Hardware-Oriented Security and Trust Symposia (HOST'16 and HOST'18) and a recipient of the 2020 Faculty Research Award from the Erik Jonsson School of Engineering and Computer Science at UT Dallas.

Fei Su

Intel Corporation, US

Biography

Fei Su received his B.S. and M.S. in Automation from Tsinghua University in 1999 and 2001, respectively. He received his Ph.D. in Electrical and Computer Engineering from Duke University in 2006. He is currently a DFX architect at Intel Corporation, leading IO/analog DFX and telemetry methodology/architecture development. His recent research interests are testability/dependability of AI hardware, and machine learning based methods for circuit/system dependability and silicon lifecycle management.

Dr. Su received the best paper award from IEEE International Conference on VLSI Design 2007, Outstanding Young Author award from IEEE Circuits and Systems society 2008. He also received Outstanding Dissertation Award, presented by European Design Automation Association (EDAA). He is 2021 recipient of SRC (Semiconductor Research Corporation) Mahboob Khan Outstanding Industry Liaison Award.

Dr. Su is a co-author of Digital Microfluidic Biochip: Synthesis, Testing and Reconfiguration Techniques (CRC Press, Oct 2006), the first published book on CAD for digital microfluidics. He has published more than 50 peer-reviewed journal and conference papers. He is inventor of 2 US granted patent and 1 US pending patent. He is the editorial board member of IEEE Design & Test (D&T), and a guest editor of IEEE D&T special issue of "Testability and Dependability of AI Hardware". He has served on technical program committees of multiple IEEE/ACM conferences (including GLSVLSI, ITC, ATS, VTS, DAC). He is Program Co-Chair of AI Hardware Test, Reliability and Security (AI-TREATS) Workshop, Corporate Support Chair of VTS'22, Publicity Chair of IEEE Silicon Lifecyle Management (SLM) workshop, Track Chair of ISQED'20-22, and North America region liaison of ETS'22. He is an IEEE Senior Member.

Dr. Su is the representative of several IEEE standard working group (including P2427 - Analog Defect Modeling, P1687.2 - Analog Test Access, P2851 - Functional Safety Format). He has served as Industry liaison of SRC on tasks of machine-learning hardware testing, microprocessor performance diagnosis, analog circuit functional safety, automotive anomaly detection, etc. He has served as Term Graduate Faculty of Duke University Electrical and Computer Engineering department since 2018, and served as PhD committee member of Missouri University of Science and Technology and Duke University.

Hussam Amrouch

University of Stuttgart, DE

Biography

Hussam Amrouch is a Junior Professor heading the Semiconductor Test and Reliability (STAR) division in the Computer Science, Electrical Engineering Faculty at the University of Stuttgart, Germany. He earned in 2015 his Ph.D. degree in Computer Science (Dr.-Ing.) from the Karlsruhe Institute of Technology (KIT), Germany with the highest distinction (summa cum laude). After which he had founded the "Dependable Hardware" research group at KIT, which he is still leading until now. Prof. Amrouch has published more than 155 multidisciplinary publications (including 60+ journals) in the major research areas across the computing stack (computer architecture, circuit design, computer aided design, and semiconductor physics). His key research interests are focused on advanced computer architectures, emerging nanotechnologies, and beyond-von Neumann hardware accelerators with a special focus one novel brain-inspired AI algorithms. He received eight times a HiPEAC Paper Award. He also received four best paper award nominations for his work in reliability: two of them from the Design Automation Conference (DAC'17, DAC'16) and one from the Design, Automation and Test in Europe Conference (DATE'17) and one from the VLSI Test Symposium (VTS'21). He serves a reviewer in many top journals such Nature Electronics, Transaction on Electron Devices, and others.

Paolo Rech

UFRGS, BR/Universita di Trento, IT

Biography

Paolo Rech received his master and Ph.D. degrees from Padova University, Padova, Italy, in 2006 and 2009, respectively. He was then a Post Doc at LIRMM in Montpellier, France. Since 2022 Paolo is an associate professor at Universitu00e0 di Trento, in Italy and since 2012 he is an associate professor at UFRGS in Brazil. He is the 2019 Rosen Scholar Fellow at the Los Alamos National Laboratory, he received the 2020 impact in society award from the Rutherford Appleton Laboratory, UK. In 2020 Paolo was awarded the Marie Curie Fellowship at Politecnico di Torino, in Italy. His main research interests include the evaluation and mitigation of radiation-induced effects in autonomous vehicles for automotive applications and space exploration, in large-scale HPC centers, and quantum computers.

Elena-Ioana Vatajelu

TSS Co-Chair, TIMA Laboratory, FR

ioana.vatajelu@univ-grenoble-alpes.fr

Haralampos Stratigopoulos

TSS Co-Chair, Sorbonne University, LIP6, FR

haralampos.stratigopoulos@lip6.fr